Computer systems in contemporary computing environments are often interconnected using local area networks (LANs) and wide area networks (WANs) to allow computer-to-computer and processor-to-processor communications. In many environments, this networking concept is extended so that multiple LANs are networked together through the use of intermediate nodes or gateways. Thus, an integrated network may be a homogeneous network or may comprise several different types of networks interconnected through gateways or interconnected through a high bandwidth backbone network.
Devices on the network may range from simple devices such as printers, modems and terminals to intelligent devices such as processors, workstations, mainframe hosts, and network controllers. With the exchange of massive amounts of information that takes place among these networked devices the communications networks are designed to carry a wide spectrum of traffic. This traffic ranges from time-critical urgent traffic and bandwidth-critical synchronous traffic, to less time-critical asynchronous background traffic.
The traffic flowing in these networks is carried in the form of data stream segments called "packets." When a network device wishes to transmit information over the network, it sends the information in packets. Each packet generally comprises two types of information: communications-related (control) information and data. The data information is simply the actual data that one device wishes to send to another device (or devices) over the network. The control information is the information required by the communications protocol to send the packet over the network from one device to another. Control information is usually in a separate part of the packet called a "header." Control information in the header is interpreted by a communications protocol processor before the packet is passed on to the receiving application. Control information can include information such as source IDs, destination IDs, routing information, error control information, and the like.
Through the use of control information to manage the routing of the packet from its source to a specified destination, multiple unique communication paths can be defined on a single integrated network. This has the effect of creating multiple virtual channels on a single physical link. Thus multiple packets can be routed to multiple destinations over a single network.
Before a packet arrives at its destination, it may travel through several intermediate network nodes called communications adapters. At these communications adapters, the packet may be affected by several layers of software and hardware before reaching the network level protocol entity. The control information in the packet header allows the network layer entity in an intermediate node to determine to which outbound link the packet should be routed. To prevent the communications adapter from becoming a communications "bottleneck" it must be capable of processing and routing these packets at rate that is at least the projected packet arrival rate.
One design of a communications adapter uses packet memory to queue packets for processing by the adapter's microprocessor. The microprocessor processes the packet control information to determine how to route the packet. If the packet has reached its final destination, the communications adapter's microprocessor transfers the processed packet to a port that is connected to a system bus or to a system I/O channel. If the packet has not reached its final destination, the microprocessor determines to which network the packet should be routed next. The microprocessor then transfers the packet to the outbound port connected to the target network link. In both cases, a port is informed that there is a packet ready to be shipped out. The informed port moves the packet out of packet memory and starts packet transmission.
For channelized networks that handle a lot of individual virtual channels, each transmit channel requires a separate queue for storing packets in packet memory. If priority traffic is accommodated, several queues may be required for each channel. For example, when channelized interfaces such as T-1 or ISDN (Integrated Services Digital Network) are used, as many as 31 messages in each direction may be active concurrently. For the communications adapter to transfer multiple interleaved concurrent packets required by these types of channelized interfaces, separate queues must be provided for each packet. The receive portion of the packet memory uses a requestor identification (ID) to identify a segment of packet memory (e.g., 256 bytes) that is active in the receive process for a given channel. For conventional systems the number of requestor IDs available is limited by the number of bits allocated to serve that function. In a typical system only eight active requestor IDs can be valid at any one time. This has the effect of limiting the number of active channels that can be received at any one time.
Each requestor ID is actually a reference number to identify a particular transmit or receive process. In conventional communications adapters, the number of concurrent transmit and receive processes is limited to the number of requestor IDs the adapter can support. When the number of concurrent processes is limited, the number of communication channels that can be simultaneously supported is also limited.
The following scenario serves to illustrate this limitation of conventional solutions. When a communications adapter is set up to receive packet data, its processor allocates packet memory to receive packets of data. The packet memory is allocated in memory segments that are typically on the order of 256 bytes. Associated with each memory segment is a requestor ID. Subsequent memory allocations for each packet will also require this requestor ID information. From the requestor ID information, the communications adapter is able to link together all buffers belonging to the same packet. In this way, multiple interleaved packets can be received as long as the processor can supply the correct requestor ID. This mechanism can also be used for multiple interleaved packet transmission.
The receiving circuitry receives packets of data and stores them into the appropriate memory segment according to packet control information (i.e., each channel is allocated its own memory segment). The requestor ID number is used to inform the processor that the queue is filled and the packets are ready to be sent to the appropriate outbound port as discussed above. The number of concurrent active channels that can be utilized then is limited to the number of memory segments that can be identified by a unique requestor ID number.
Limiting the number of effective channels that can be handled by an integrated network in this manner is a hindrance to the type of high speed, multiple interleaved packet communication desired in today's systems. What is needed is a technique for increasing the number of concurrent interleaved packets that can be handled by a network node.